[Beowulf] CPU Startup Combines CPU+DRAM?And A Whole Bunch Of Crazy

[Andrew Piskorski]

On Mon, Jan 23, 2012 at 03:50:09PM -0500, Rayson Ho wrote:

> http://iram.cs.berkeley.edu/
> 
> So 15 years later someone suddenly thinks that it is a good idea to
> ship IRAM systems to real customers?? :-D

Sure.  But from when I last read about the IRAM stuff, I'm pretty sure
it was strictly single core.  Their VIRAM1 chip had 13 MB of DRAM, 1
cpu core, and 4 "vector lanes", with no mention of SMP or any sort of
multi-chip parallelism at all.  If Venray has a good design for using
hundreds or more IRAM-like chips in a parallel machine, that sounds
like a significant step forward.  (The intended fab process and
attendant design rules might also be quite different, although I'm not
at all sure about that.)

-- 
Andrew Piskorski <atp at piskorski.com>
http://www.piskorski.com/