[vortex] 3c59x network driver question
Bogdan Costescu
Bogdan.Costescu at iwr.uni-heidelberg.de
Tue Sep 27 01:26:11 PDT 2005
On Sat, 24 Sep 2005, Jonathan Lynch wrote:
> what does the register RxDComplete mean ?
It's not a register, but a bit. It means that the card has finished
all processing needed for receiving the packet and the CPU is now free
to do whatever it wants with the packet.
> The function boomerang_rx() loops on its value to take packets of
> the rx ring buffer. Does this mean that while there are still
> packets in the rx ring the interrupt handler will pass them up to
> upper layers ?
Yes.
> I have notcied that a lot of delay is introduced in the router due
> to the way packets from both incoming interfaces end up in the
> output queue.
I don't quite understand what you want to say here: what delay are you
measuring ? How do you track packets from the incoming interfaces in
the output queue ?
> When there are two network interfaces mainly receiving packets and
> one mainly sending, will their interrupt number affect how the order
> packets are put into the queue for transmission?
No.
> Again, I would really appreciate if someone could answer my question.
Apart from the RxDComplete bit, your questions are not vortex
specific; you might get better answers on the netdev mailing list.
--
Bogdan Costescu
IWR - Interdisziplinaeres Zentrum fuer Wissenschaftliches Rechnen
Universitaet Heidelberg, INF 368, D-69120 Heidelberg, GERMANY
Telephone: +49 6221 54 8869, Telefax: +49 6221 54 8868
E-mail: Bogdan.Costescu at IWR.Uni-Heidelberg.De
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