[vortex] 3c595 'Transmit error, Tx status register 90' revisited

[Koos van den Hout]

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After I ran into the aforementioned error again (bigtime) I decided to
google for other reports of this error. I have mentioned it to this list
before, we never got anything better out of it then 'yes, this is a
problem'.

Searching the archives of this list with google gives a *lot* of reports
for this error
http://www.google.com/search?hl=en&lr=&safe=off&q=+site:www.scyld.com+Transmit+error,+Tx+status+register+3c595

Anyway, I found:

http://www.scyld.com/pipermail/vortex-bug/1999-August/000524.html

which suggests a somewhat crude patch which changes the location of the
reset of the card.

I tried to implement this patch in the 2.2.19 driver, which required some
big adjustments because the structure of the driver has changed quite a
lot. Anyway, hand-editing stuff worked.

With the updated version, I still get the

eth0: Transmit error, Tx status register 90.

in my logs, it just recovers faster and continues.

Patch attached. Because this is probably very specific to the 3c595 (and
maybe only certain versions) I do not recommend adding it to the standard
driver, but as a quickfix until a better networkcard is found[1] it works.

[1] any opinions about the Netgear FA311/FA312 which you would like to
mail me ?

                                               Koos van den Hout

-- 
Koos van den Hout,           PGP keyid RSA/1024 0xCA845CB5 via keyservers
koos@kzdoos.xs4all.nl        or DSS/1024 0xF0D7C263                        -?)
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--- 3c59x.c.orig	Sun May  6 23:25:02 2001
+++ 3c59x.c	Sun May  6 23:39:12 2001
@@ -531,6 +531,17 @@
 	u16 capabilities, info1, info2;		/* Various, from EEPROM. */
 	u16 advertising;					/* NWay media advertisement */
 	unsigned char phys[2];				/* MII device addresses. */
+
+#define       SUH_HACK
+/*
+** I think that tx_reset should be done outside of the interrupt.
+** If you network is jammed during heavy load and syslog shows
+** "Transmit error" message, pls try me.
+*/
+#ifdef        SUH_HACK
+	/* tx_reset seems to be done outside of interrupt. */
+	u16     tx_need_reset;
+#endif
 	u16 deferred;						/* Resend these interrupts when we
 										 * bale from the ISR */
 	spinlock_t lock;
@@ -1515,22 +1526,46 @@
 		}
 	}
 	if (do_tx_reset) {
+#ifndef SUH_HACK
 		wait_for_completion(dev, TxReset);
 		outw(TxEnable, ioaddr + EL3_CMD);
 		if (!vp->full_bus_master_tx) {
 			clear_bit(0, (void*)&dev->tbusy);
 			mark_bh(NET_BH);
 		}
+#else
+		vp->tx_need_reset=1;
 	}
 
 }
 
+static void vortex_tx_reset(struct device *dev)
+{
+	struct vortex_private *vp = (struct vortex_private *)dev->priv;
+	long ioaddr = dev->base_addr;
+
+	wait_for_completion(dev, TxReset);
+	outw(TxEnable, ioaddr + EL3_CMD);
+	if (!vp->full_bus_master_tx) {
+		clear_bit(0, (void*)&dev->tbusy);
+		mark_bh(NET_BH);
+	}
+}
+#endif	
+
 static int
 vortex_start_xmit(struct sk_buff *skb, struct device *dev)
 {
 	struct vortex_private *vp = (struct vortex_private *)dev->priv;
 	long ioaddr = dev->base_addr;
 
+#ifdef SUH_HACK
+	if (vp->tx_need_reset) {
+		vp->tx_need_reset = 0;
+		vortex_tx_reset(dev);
+		return 1;
+	}
+#endif
 	if (test_and_set_bit(0, (void*)&dev->tbusy) != 0) {
 		if (jiffies - dev->trans_start >= TX_TIMEOUT)
 			vortex_tx_timeout(dev);

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