Performance of Tulip/PNIC chips

Donald Becker
Mon Nov 30 21:47:59 1998

On Mon, 30 Nov 1998, Chris Worley wrote:

> I building a Linux-based router/gateway and am planning to use three
> Tulip cards.
> Can the tulip-based controllers make efficient use of a 100 Mhz bus
> interface PCI (vs. 66MHZ)?
> In other words, do they do burst transfers at the 100 Mhz speed, or
> would there be little difference with the slower bus?

The PCI bus is still running at 33Mhz on your systems, independent of the
memory bus speed.
While there are machines with 66Mhz PCI buses (mostly recent Alphas) they
are very rare.

> I'd like to know the amount of buffering in the chip as well as the
> default in the driver (I figure the driver buffers basically the MTU
> times the number of allocated Tx and Rx ring buffers... is that
> right?).  The reason is to understand how much "skid" there is to work
> with on the router and on my real-time application.

The chip can buffer about 4K, but that's only to handle PCI bus access
latency.  Typically the chip is buffering only 100 bytes or so.

The driver can buffer TX_RING_SIZE packets, and can receive up to
RX_RING_SIZE packets before starting to drop.  In most environments you'll
rarely get more than six packets on the chip's transmit ring, and most
receive packets are transferred from the chip's receive ring to the software
queue layer immediately.

The software queue layer is limited to 100 transmit and 300 receive packets
(with ethernet).  Additional packets are silently dropped(!).

Donald Becker
USRA-CESDIS, Center of Excellence in Space Data and Information Sciences.
Code 930.5, Goddard Space Flight Center,  Greenbelt, MD.  20771