[Beowulf] Register article on AMD OCP motherboards

Eugen Leitl eugen at leitl.org
Thu May 16 05:34:19 PDT 2013

On Thu, May 16, 2013 at 12:02:42AM +0000, Lux, Jim (337C) wrote:

> There are people looking at clusters of FPGAs, with processors either
> instantiated in the FPGA logic, or part of the fabric (e.g. PowerPC cores
> in Xilinx FPGAs).

Notice that Parallella Epiphany is basically an on-die DSP
(TigerSHARC) cluster on a mesh, with the ARM core being
a part of the Zynq 7020 FPGA. They claim a 8x better power
efficiency than BlueGene/Q (benchmarks don't lie, liars
do benchmarks). 

I do expect that you can do interesting things with these
spare 48 pins of FPGA I/O on that board, along with the
GBit Ethernet.
> However, you pay a power penalty for FPGA vs the same computation in "non
> reprogrammable logic" (e.g. An ASIC).  I don't know that this is a
> fundamental limitation.. You probably can't make a FPGA cell as small as a
> ASIC cell, though.
> >From the Beowulf standpoint, though, I don't know if there's anything that
> could be called a "commodity" FPGA platform that has consumer prices.

I would say that 99/199 USD for the 16/64 core Epiphany dev kits is pretty
consumer-friendly, though it's not Beowulf in the sense that it's
single-vendor, and not COTS.

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