Fwd: [Beowulf] Teraflop chip hints at the future

Brian D. Ropers-Huilman brian.ropers.huilman at gmail.com
Wed Feb 14 14:01:46 PST 2007

Meant to send this to the list as well...

---------- Forwarded message ----------
From: Brian D. Ropers-Huilman <brian.ropers.huilman at gmail.com>
Date: Feb 14, 2007 4:01 PM
Subject: Re: [Beowulf] Teraflop chip hints at the future
To: Andrew Piskorski <atp at piskorski.com>

Perhaps your thinking of Thomas Sterling's work on the MIND processor:

"He is developing the MIND processor in memory architecture based on
ParalleX, an advanced message-driven split-transaction computing model
for scalable low-power fault-tolerant operation.

In addition, he is developing an ultra lightweight supervisor runtime
kernel in support of MIND and other fine grain architectures (like
CELL) and the Agincourt parallel programming language for high
efficiency through intrinsics in support of latency hiding and low
overhead synchronization for both conventional and innovative parallel
computer architectures."

[ http://cacr.library.caltech.edu/104/01/IWIA_paper2005_Sterling.pdf ]
[ http://www.cct.lsu.edu/~tron/ ]

On 2/14/07, Andrew Piskorski <atp at piskorski.com> wrote:
> On Wed, Feb 14, 2007 at 12:17:59PM -0500, Mark Hahn wrote:
> > that's not the point, of course - even a small CPU on each dram chip would
> > add up to a profoundly powerful system.  for instance, take a pretty mundane
> > 2-socket, 16GB workstation today and notice it's got probably 128 separate
> > dram chips.  imagine if each of those had even a small onchip processor
> A few years ago, there was at least one academic research project
> designing such CPU-in-RAM chips.  Basically, a RAM chip with a
> smallish CPU in the corner.  I can't remember the name of the project
> though!
> I think they actually fabbed some of their chips, although I don't
> recall for sure.  But, I do remember that they were strictly working
> on SINGLE chips, one small CPU in one big RAM chip.  At least at the
> time, they were not even considering how to link up many such chips to
> form a larger, multi-CPU machine.
> --
> Andrew Piskorski <atp at piskorski.com>
> http://www.piskorski.com/
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Brian D. Ropers-Huilman

Brian D. Ropers-Huilman

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