[Beowulf] fast interconnects, HT 3.0 ...
eugen at leitl.org
Tue May 23 07:50:26 PDT 2006
On Tue, May 23, 2006 at 08:49:08AM -0500, Richard Walsh wrote:
> Speaking of Hyper Transport 3.0 and its AC chassis-to-chassis
> capabilities and 10 to 20
> Gbps performance maximums one-way (non-coherent, off chassis I
> believe), what do the
> people that know say about scalability. Are we looking at coherency
I don't know (like it would stop me), but there are few-port HT switches,
and if there are several ports on one chassis one could wire up
some topology, which, hopefully, will match the problem.
> within the board complex
> and basic reference ability off board or something else?
I'm not sure how this is different from vanilla packet-switched
MPI network. It's not about maintaining memory coherency.
> Sounds like the Cray X1E pGAS memory model. Is there a role for
I don't think there is any other model but message passing. It's not
like this is a ccHT a la HORUS http://en.wikipedia.org/wiki/HORUS_interconnect
> switches? And then there is the
> its intersection with the pGAS language extensions (UPC and CAF)
> ... raising the prospect of
> much better performance in a commodity regime, with possible
> implications for MPI use.
> Anyone have a crystal ball or insights on this?
Eugen* Leitl <a href="http://leitl.org">leitl</a> http://leitl.org
ICBM: 48.07100, 11.36820 http://www.ativel.com
8B29F6BE: 099D 78BA 2FD3 B014 B08A 7779 75B0 2443 8B29 F6BE
-------------- next part --------------
A non-text attachment was scrubbed...
Size: 191 bytes
Desc: Digital signature
More information about the Beowulf