[Beowulf] Hruska had no Epiphany

Eugen Leitl eugen at leitl.org
Wed Oct 31 05:50:01 PDT 2012



> The reason for this is pretty simple. The Epiphany IV architecture, like a number of many-core architectures, dumps most of the features that CPUs (both RISC and CISC) have relied on to boost performance over the past thirty years.

Well, duh, if you've fallen into a deep well you need to
trim the fat in order to get out again. Digging yourself
further in definitely doesn't help.

> There are no caches; each core is assigned its own slice of RAM.

Which is a very good thing, as putting core next to
the CPU is the only way to boost throughput, and cache
makes on-die SRAM (or MRAM) actually slower as well
as burns juice, gates and dilutes silicon real estate.

Can you tell I like this thing?

> Cores can access data held by other cores

The designer was a nice guy, he emulated global
memory with message passing. A tradeoff made to coddle
the weak.

> but the latency impact will inevitably be considerable. 

Obey the speed of light limit, since it's the law.

> The specs above imply that each Parallela platform will have between 16-64MB of RAM depending on the final number of processors.

Dunno, I can work with that.

> The reason Intel, AMD, and Nvidia haven’t gone down this road is because the final product is extremely specialized. 

No, they know that the computer industry has painted
itself into a corner, and the result wouldn't sell.
Actually Adapteva catering to the small tinkerer and
educational sector for bootstrap was probably the
best move they could do.

> Adapteva has created an FPU co-processor that’s extremely good at a very narrow set of tasks.

That would seem in the eye of the observer. I would
say it maps to the vast majority of the tasks, if you
know how.

> Unfortunately, this is completely out of step with the general goals of the computing industry. 

The worse for the computing industry, then.

> Over the past thirty years, controllers and co-processors that once required their own expansion cards or motherboard sockets have steadily moved away from separate hardware implementations and towards integration — first on the motherboard, and now on the processor.

It's a cluster on a chip, fer chrissakes. If that's not integration, I don't know
what integration is. 

I hope Adapteva makes it to kilocore and 3D mesh, that would
be very useful thing in the right price and power bracket.

I might be not able to afford a BlueGene, but I can probably afford this.

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