Beowulf: A theorical approach

Robert G. Brown rgb at
Sat Jun 24 09:41:02 PDT 2000

On Fri, 23 Jun 2000, Christoph Wasshuber wrote:

> I am planing to design an affordable motherboard for Beowulfery
> with a fast low latency network. The current plan is to
> use the idea of PAPERS but scale it to 16, 32, or 64 bit
> parallel with direct access to the CPU. Latencies of <100ns
> should be possible. So the interface itself will be very
> cheap because the hardware of PAPERS is trivial. Hooking this
> up to the host bus, if possible with an FPGA, does not cost much
> more than standard NICs today.
> In case some think that designing a new motherboard is not
> cost effective, I have several quotes for the layout and manufacturing
> of such motherboards. Even with an initial prototype run of only
> 100 motherboards one could achieve a price of ~$150 per motherboard
> for AMD K6 based design (only counting manufacturing and not design).
> I am willing to fund such an effort. but I would need circuit designers
> who are up to the challenge.

It was suggested to me offline that one should consider the AGP bus
itself as a possible interface, as it apparently has a lot of the
desired characteristics (and since beowulf nodes typically don't need
the AGP slot anyway).  I'm not an AGP bus expert by any means (it's hard
enough trying to get PCI specs from the net:-) but this might be worth
looking into.


Robert G. Brown	             
Duke University Dept. of Physics, Box 90305
Durham, N.C. 27708-0305
Phone: 1-919-660-2567  Fax: 919-660-2525     email:rgb at

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