[vortex] 3c905CX things

Andrew Morton andrewm@uow.edu.au
Mon, 01 Jan 2001 19:03:38 +1100


I've finally had a sane report back from a 905CX owner.  It
takes 32 milliseconds for the initial RxReset to complete.
No other commands are reported as exceeding the 2,000 PCI
cycles, however he wouldn't have exercised the other
RxReset in vortex_error().

I'll be sticking with the udelay(10) busy loop for the
while - it seems minimum risk.

It _is_ safe to schedule() within vortex_up().  It's not safe
to schedule() in vortex_probe() because of the probe/open race.
So long-term, a schedule_timeout(1) is a better approach to handling
the RxReset timer.

The change to the MII scan order works fine.  In fact, this is
what 3com recommend in the 905C document: look at index 24 first.
So I now have:

        for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
            int mii_status, phyx;

            /*
             * For the 3c905CX we look at index 24 first, because it bogusly
             * reports an external PHY at all indices
             */
            phyx = phy;
            if (phy == 0)
                phyx = 24;
            else if (phy == 24)
                phyx = 0;
            mii_status = mdio_read(dev, phyx, 1);

Questions:

1: Why is vp->phys[] a two-char array?  The driver never uses anything
   apart from phys[0].

2: I'm including this code:

        /* Check the PCI latency value.  On the 3c590 series the latency timer
           must be set to the maximum value to avoid data corruption that occurs
           when the timer expires during a transfer.  This bug exists the Vortex
           chip only. */
        pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
        if (pci_latency < new_latency) {
            printk(KERN_INFO "%s: Overriding PCI latency"
                " timer (CFLT) setting of %d, new value is %d.\n",
                dev->name, pci_latency, new_latency);
                pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
        }

But this is currently done for all PCI devices.  Shouldn't it
only be done for IS_VORTEX devices?