[vortex] What do RX-FIFO errors mean?

[Bogdan Costescu]

On Sun, 26 Aug 2001, Ben Greear wrote:

> > The question is, what causes RX-FIFO errors, and what can I do
> > to make them go away?
> However, I would still like to know what kind
> of things cause the RX-FIFO, as I could just be masking a real
> problem...

The architecture of the modern 3Com cards specifies a FIFO buffer which is
used to store the incoming packet(s) from the wire until they are uploaded
to the main memory by means of DMA (upload is the term used by 3Com for
the Rx part in their docs). If the upload is delayed for whatever reason
and there is Rx activity, the card fills in this buffer after which is
stalled, not being able to receive any more packets; this situation is
signalled with the Rx FIFO error.

I think that this situation happens when the host is too busy to accept
incoming packets. This means that the Rx ring is not emptied any more, the
upload is stalled when the ring becomes full and the FIFO overrun occurs.

Best regards,

Bogdan Costescu

IWR - Interdisziplinaeres Zentrum fuer Wissenschaftliches Rechnen
Universitaet Heidelberg, INF 368, D-69120 Heidelberg, GERMANY
Telephone: +49 6221 54 8869, Telefax: +49 6221 54 8868
E-mail: Bogdan.Costescu@IWR.Uni-Heidelberg.De