[eepro100] Problem with eepro100 and i82559 NIC

David =?iso-8859-1?Q?M=FCller?= (ELSOFT AG) d.mueller@elsoft.ch
Mon, 26 Jun 2000 11:30:13 +0200

Donald Becker wrote:
> On Sat, 24 Jun 2000, David [iso-8859-1] Müller wrote:
> > I have a problem to bring my Strongarm (SA-110) based
>                                ^^^^^^^^^^^^^^^^^^
> > Linux (2.3.39) system and an Intel 82559 based NIC together.
> What hardware are you using?

The hardware is an EBSA-285, the SA-110 eval board from Intel.

> The StrongARM is problematic, since it's not cache coherent with PCI bus
> transactions.  All bus-master device drivers must be modified to work with
> it.
> We had been talking to the network device side of Intel (the people that
> make switches, not the people that make the network adapters) about doing
> the StrongARM support as part of a larger project, but that work seems to
> have fallen through.  Thus I don't have any hardware to test StrongARM
> specific driver modifications.
> > eepro100.c:v1.09j 7/27/99 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/eepro100.html
> > eth0: Intel PCI EtherExpress Pro100 at 0xc1800000, 00:D0:B7:4C:36:56, IRQ 24.
> >   Receiver lock-up bug exists -- enabling work-around.
> >   Board assembly 721383-008, Physical connectors present: RJ45
> >   Primary interface chip i82555 PHY #1.
> > Self test failed, status ffffffff:
> >  Failure to initialize the i82557.
> This is the primary problem.  It may be that the self-test worked but the
> chip is reading the cache line with the old value.
> You must put in cache coherency calls before reading any cache line written
> by the bus master.

Yes, this sounds quite reasonable. I will give it a try as soon as 
i have figured out what code i have to patch at which location.