[Beowulf] AMD and AVX512

Andrew M.A. Cater amacater at einval.com
Mon Jun 21 14:46:53 UTC 2021

On Mon, Jun 21, 2021 at 09:46:30AM -0400, Joe Landman wrote:
> On 6/21/21 9:20 AM, Jonathan Engwall wrote:
> > I have followed this thinking "square peg, round hole."
> > You have got it again, Joe. Compilers are your problem.
> Erp ... did I mess up again?
> Here's where awesome compiler support would help.  FWIW, gcc isn't that
> great a compiler.  Its not performance minded for HPC. Its a reasonable
> general purpose standards compliant (for some subset of standards)
> compilation system.  LLVM is IMO a better compiler system, and its
> clang/flang are developing nicely, albeit still not really HPC focused. 
> Then you have variants built on that.  Like the Cray compiler, Nvidia
> compiler and AMD compiler. These are HPC focused, and actually do quite well
> with some codes (though the AMD version lags the Cray and Nvidia compilers).
> You've got the Intel compiler, which would be a good general compiler if it
> wasn't more of a marketing vehicle for Intel processors and their features
> (hey you got an AMD chip?  you will take the slowest code path even if you
> support the features needed for the high performance code path).
> Maybe, someday, we'll get a great HPC compiler for C/Fortran.
The problem is that, maybe, the HPC market is still not _quite_ big enough
to merit a dedicated set of compilers and is diverse enough in its problem 
sets that we still need a dozen or more specialist use cases to work well.

You would think there would be a cross-over point where massively parallel
scalable cloud infrastructure wold intersect with HPC but that doesn't
seem to be happening. Parallelisation is the great bugbear anyway.

Most of the experts I know on all of this are the regulars on this list:
paging Greg Lindahl ... 

All the best,

Andy Cater

> -- 
> Joe Landman
> e: joe.landman at gmail.com
> t: @hpcjoe
> w: https://scalability.org
> g: https://github.com/joelandman
> l: https://www.linkedin.com/in/joelandman

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