[Beowulf] New Spectre attacks - no software mitigation - what impact for HPC?
John Hearns
hearnsj at googlemail.com
Tue Jul 17 01:10:51 PDT 2018
I guess I am not going to explain myself very clearly here. Maybe I wont
make a coherent point.
I think I read on The Next Platform at the time a comment along the lines
of - "as CPU Mhz speeds cannot continue to rise,
smart engineers who design CPUs have had to come up with mechanisms to
increase performance continually, in the face of software developers who
will not modernise their code."
Indeed of course we all run a huge base of legacy codes, and these will nto
be retired any time soon.
So speculative execution is one mechanism to 'save the bacon' of users
wanting more and more performance.
We in Beowulfery have taken advantahe of general purpose CPUs. Indeed,
with CPUs themselves having wide vector units and several units per package
(AMD) they actual CPU package looks like a supercomputer of old.
I digress. The big companies produce CPUS for the datacentre market, which
is of course their biggest market. I get the impression that HPC is no
small market either, and CPU varieties are engineered specifically for the
HPC market.
To be clear, my argument is NOT that HPC is some sort of leftover from the
data centre market - indeed it is a prime and growing market.
However, in the past there were specific architectures and instruction sets
for supercomputing. What I am going to throw out to the floor is:
* The IT industry goes round in cycles. Is the time right for HPC specific
processors again?
* Yes, you would need a Linux kernel and distribution ported to that CPU
instruction set
* Regarding compiler technology, how important is speculative execution for
HPC style codes?
* For the point above, can anyone point to studies where retired
instructions versus unused have been counted for HPC codes?
https://software.intel.com/en-us/vtune-amplifier-help-instructions-retired-event
* What would HPC specific processors look like? Would they have speculative
execution? What else would be missing - or added?
On 17 July 2018 at 09:33, Chris Samuel <chris at csamuel.org> wrote:
> On Tuesday, 17 July 2018 11:08:42 AM AEST Chris Samuel wrote:
>
> > Currently these new vulnerabilities are demonstrated on Intel & ARM, it
> will
> > be interesting to see if AMD is also vulnerable (I would guess so).
>
> Interestingly RISC-V claims immunity, and that looks like it'll be one of
> the
> two CPU architectures blessed by the Europeans in their Exascale project
> (along with ARM).
>
> https://riscv.org/2018/01/more-secure-world-risc-v-isa/
>
> All the best,
> Chris
> --
> Chris Samuel : http://www.csamuel.org/ : Melbourne, VIC
>
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