[Beowulf] Intel kills Knights Hill, Xeon Phi line "being revised"

[Richard Walsh]

Well ... 

KNL is (only?) superior for highly vectorizable codes that at scale can run out of MCDRAM (slow scaler performance). Multiple memory and interconnect modes (requiring a reboot to change) create a programming complexity (e.g managing affinity across 8-9-9-8 tiles in quad mode) that few outside the National Labs were able-interested in managing. Using 4 hyper threads not often useful. When used in cache mode, direct mapped L3 cache suffers gradual perform degradation from fragmentation.  Delays in its release and in the tuning of the KNL BIOS for performance shrunk its window of advantage over Xeon line significantly, as well as then new GPUs (Pascal).  Meeting performance programming challenges added to this shrink (lots of dungeon sessions), FLOPS per Watt good but not as good as GPU. Programming environment compatibility good, although there are those instruction subsets that are not portable ... got to build with

-xCOMMON-AVX512 ... 

But as someone said “it is fast” ... I would say maybe now it “was fast” for a comparably short period of time.  If you already have 10s of racks and have them figured out then you like the reduced operating cost and may just buy some more as the price drops, but if you did not buy in gen 1 then maybe you are not so disappointed at the change of plans ... and maybe it is time to merge many-core and multi-core anyway.  

Richard Walsh
Thrashing River Computing 

Sent from my iPhone

> On Nov 19, 2017, at 5:20 PM, Christopher Samuel <samuel at unimelb.edu.au> wrote:
> 
>> On 19/11/17 10:40, Jonathan Engwall wrote:
>> 
>> I had no idea x86 began its life as a co-processor chip, now it is not
>> even a product at all.
> 
> Ah no, this was when floating point was done via a co-processor for the
> Intel x86..
> 
> -- 
> Christopher Samuel        Senior Systems Administrator
> Melbourne Bioinformatics - The University of Melbourne
> Email: samuel at unimelb.edu.au Phone: +61 (0)3 903 55545
> 
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