[Beowulf] Hyperthreading and 'OS jitter'

Nathan Moore ntmoore at gmail.com
Tue Jul 25 15:20:52 PDT 2017


> Re: having a specialized, low-power core, this is clearly something that's
> already been successful in the mobile device space. The big.LITTLE
> <https://en.wikipedia.org/wiki/ARM_big.LITTLE> ARM architecture is
> designed for this kind of thing and has been quite successful. Certainly,
> now that Intel and AMD are really designing modular SoC-like products, it
> wouldn't be terribly difficult to bake in a couple of low power x86 cores
> (e.g. Atom or Xeon-D + larger Skylake die in Intel's case; Jaguar + Zen in
> AMD's case). I'm not an expert in fab economics, but I don't believe it
> would not significantly add to production costs.

​ "textbook" answer​ to integrated circuit manufacturing is that there need
be no dependence of device cost on number of gates/device complexity.
Fundamentally, you're just printing/etching a slightly more complicated
mask on a circuit board.  The number of gates and the probability of
defects are probably proportional - didn't AMD sell 6 and 3 core processors
for a while?  I always assumed those were 4 or 8 core procs that had
critical defects in one of the cores.  Sorry, no first-hand knowledge

Jim Lux probably knows the real answer.

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