[Beowulf] 3D Xpoint Memory
prentice.bisbal at rutgers.edu
Wed Jul 29 08:52:25 PDT 2015
Thanks for the reply. I figured that was the case. Just for the record,
I wasn't criticizing you, I was criticizing Intel/Micron for not
providing them. New technology is great, but how it's performance
compares to existing products is really the most important information.
Office of Instructional and Research Technology
On 07/29/2015 10:53 AM, Nicole Hemsoth wrote:
> If they had been able to give a single metric or estimate we would
> have published it. There are frustratingly few details here. At all.
> But we will keep digging.
> On Wed, Jul 29, 2015 at 10:44 AM, Prentice Bisbal
> <prentice.bisbal at rutgers.edu <mailto:prentice.bisbal at rutgers.edu>> wrote:
> On 07/29/2015 09:19 AM, Douglas Eadline wrote:
> This could change a few things, non-transistor memory.
> "An Intel spokesperson categorically denied that it was a
> memory process or a memristor technology. Spin-transfer torque
> was also
> dismissed. Whatever it is, Intel and Micron have been
> developing it for
> about ten years, and together as a joint venture since 2012."
> Did I miss something, or were performance metrics (or at least
> estimates) completely missing from this article? The one graphics
> says the cells can switch states 1000x faster than NAND, but what
> does that mean for a complete package, after all the other memory
> components are in the picture (bus, controller, etc)?
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> Nicole Hemsoth
> Co-Editor, The Platform <http://www.theplatform.net>
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