[Beowulf] would it be possible to implement an 6x 8 I/O message-passing interface with the Zynq-7020?

[Eugen Leitl]

http://www.xilinx.com/publications/prod_mktg/zynq7000/Zynq-7000-combined-product-table.pdf

See the Z-7020 column.

There are 48 FPGA lines available on the Parallella board.
So there's 8 pins for each space direction on a 3d node grid.

Those of you who grok FPGA, how much can be done with
that chip?