[Beowulf] Is there really a need for Exascale?

[Eugen Leitl]

On Thu, Nov 29, 2012 at 01:14:39AM -0500, Mark Hahn wrote:

> > At some point, light speed becomes the limiting factor, and for that,
> > reducing physical size is important.
> 
> we're quite a way away from that.  I don't see a lot of pressure to 
> improve fabrics below 1 us latency (or so), ie, 1000 light-feet.

I disagree. On-die/wafer meshes should not add more than 1-5 ns
at each hop. Sending message should take order of magnitude
memory access. Off die will be slower, but not much slower.

This is the only way to make megacore and gigacore work.
Lightweight message passing directly in hardware, with
cut-through, perhaps optical waveguides on silicon, at 
least for longer distances (e.g. integrated silicon
nanophotonics). In general, optical TBit/s are easy, if geometries
and distances are very small (um-mm die interconnect).
 
> > Consumer gear is heading smaller, in
> > general (viz PC mobos getting smaller over the years),
> 
> mainly due to integration, not anything else.  intel put cache onchip
> because it made performance sense, not because it freed up a few 
> sq inches of motherboard.

I've been waiting for cache to die and be substituted by
on-die SRAM or MRAM. Yet to happen, but if it happens,
it will be with embedded-like systems.
 
> > production density.  Consumer markets have the advantage of enormous
> > volumes to spread the very high non-recurring-engineering cost over.