[Beowulf] Intel unveils 1 teraflop chip with 50-plus cores

[Micha]

They are just busting the one teraflop but they are going with it into the GPU market, only without a GPU, i.e. they're competing with the Tesla GPU here. The Tesla admittedly is also about 1 TFlops but the consumer market has already gone past the 2 TFlop mark about a year ago and the next generation is just around the corner (will be operational before the mic). And the funny part is that its a discrete (over pci) card that is running a software micro-kernel ands scheduler that you can ssh into.
I'm not sure how much I buy into the hype their selling that it's the next best thing because its x86 so you run the same code, although aparantly its not binary compatible, so you do need to recompile. And I think we all know that real world codes need a rework to transfer well to different vector sizes and communication/synchronization/etc. So why is it so much better than picking up an AMD or NVIDIA? 

Eugen Leitl <eugen at leitl.org> wrote:


http://seattletimes.nwsource.com/html/technologybrierdudleysblog/2016775145_wow_intel_unveils_1_teraflop_c.html

Wow: Intel unveils 1 teraflop chip with 50-plus cores

Posted by Brier Dudley

I thought the prospect of quad-core tablet computers was exciting.

Then I saw Intel's latest -- a 1 teraflop chip, with more than 50 cores, that
Intel unveiled today, running it on a test machine at the SC11 supercomputing
conference in Seattle.

That means my kids may take a teraflop laptop to college -- if their grades
don't suffer too much having access to 50-core video game consoles.

It wasn't that long ago that Intel was boasting about the first supercomputer
with sustained 1 teraflop performance. That was in 1997, on a system with
9,298 Pentium II chips that filled 72 computing cabinets.

Now Intel has squeezed that much performance onto a matchbook-sized chip,
dubbed "Knights Ferry," based on its new "Many Integrated Core" architecture,
or MIC.

It was designed largely in the Portland area and has just started
manufacturing.

"In 15 years that's what we've been able to do. That is stupendous. You're
witnessing the 1 teraflop barrier busting," Rajeeb Hazra, general manager of
Intel's technical computing group, said at an unveiling ceremony. (He holds
up the chip here)

A single teraflop is capable of a trillion floating point operations per
second.

On hand for the event -- in the cellar of the Ruth's Chris Steak House in
Seattle -- were the directors of the National Center for Computational
Sciences at Oak Ridge Laboratory and the Application Acceleration Center of
Excellence.

Also speaking was the chief science officer of the GENCI supercomputing
organization in France, which has used its Intel-based system for molecular
simulations of Alzheimer's, looking at issues such as plaque formation that's
a hallmark of the disease.

"The hardware is hardly exciting. ... The exciting part is doing the
science," said Jeff Nichols, acting director of the computational center at
Oak Ridge.

The hardware was pretty cool, though.

George Chrysos, the chief architect of Knights Ferry, came up from the
Portland area with a test system running the new chip, which was connected to
a speed meter on a laptop to show that it was running around 1 teraflop.

Intel had the test system set up behind closed doors -- on a coffee table in
a hotel suite at the Grand Hyatt, and wouldn't allow reporters to take
pictures of the setup.

Nor would the company specify how many cores the chip has -- just more than
50 -- or its power requirement.

If you're building a new system and want to future-proof it, the Knights
Ferry chip uses a double PCI Express slot. Chrysos said the systems are also
likely to run alongside a few Xeon processors.

This means that Intel could be producing teraflop chips for personal
computers within a few years, although there's lots of work to be done on the
software side before you'd want one.

Another question is whether you'd want a processor that powerful on a laptop,
for instance, where you may prefer to have a system optimized for longer
battery life, Hazra said.

More important, Knights Ferry chips may help engineers build the next
generation of supercomputing systems, which Intel and its partners hope to
delivery by 2018.

Power efficiency was a highlight of another big announcement this week at
SC11. On Monday night, IBM announced its "next generation supercomputing
project," the Blue Gene/Q system that's heading to Lawrence Livermore
National Laboratory next year.

Dubbed Sequoia, the system should run at 20 petaflops peak performance. IBM
expects it to be the world's most power-efficient computer, processing 2
gigaflops per watt.

The first 96 racks of the system could be delivered in December. The
Department of Energy's National Nuclear Security Administration uses the
systems to work on nuclear weapons, energy reseach and climate change, among
other things.

Sequoia complements another Blue Gene/Q system, a 10-petaflop setup called
"Mira," which was previously announced by Argonne National Laboratory.

A few images from the conference, which runs through Friday at the Washington
State Convention & Trade Center, starting with perusal of Intel boards:


Take home a Cray today!

IBM was sporting Blue Genes, and it wasn't even casual Friday:

A 94 teraflop rack:
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