[Beowulf] Rackable / SGI

Eugen Leitl eugen at leitl.org
Sat Apr 4 07:06:22 PDT 2009

On Fri, Apr 03, 2009 at 01:32:13PM -0700, Greg Lindahl wrote:

> > Will have to do with embedded memory or stacked 3d memory a la
> > http://www.cc.gatech.edu/~loh/Papers/isca2008-3Ddram.pdf
> We've been building bigger and bigger SMPs for a long time, making
> changes to improve the memory system as needed. How is multicore any

Off-die memory bandwidth and latency are limited, so many codes
start running into memory bottlenecks even at moderate number
of cores (quad-cores seem to be a sweet spot). Mounting
memory on top of CPU cores, and 3d stacks with through vias 
appears a cheap way to increase lanes and shrink geometries,
which allows for higher data rates and less heat dissipation.

Of course this arguably won't scale to a kilocore on-die (or
wafer), and SMP emulating a shared memory will probably break
down way before (synchronizing lots of writes to the same
location is expensive in this relativistic shared-nothing universe).

> different? In the computer industry, change is normal.

Incremental changes, sure. 

Eugen* Leitl <a href="http://leitl.org">leitl</a> http://leitl.org
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