[Beowulf] slightly [OT] smp boxes

Bruno Coutinho coutinho at dcc.ufmg.br
Fri Oct 17 11:44:00 PDT 2008

Sun has a 8 socket AMD machine:

Tyan has a 8 socket opteron server too:

IBM has some 8+ socket x86 systems, it seem they use a NUMAlink like
interconnect called ex4:

HP has 8 socket opteron systems too:

There are some high end x86 systems from UNISYS too, but beyond that I think
you will have to look for RISC systems.

2008/10/17 Prentice Bisbal <prentice at ias.edu>

> andrew holway wrote:
> > Hi
> >
> > If you wanted to buy an smp machine of 8, 16 or 32 sockets, what would
> > be your options?
> >
> Do you really mean SMP, or just 8, 16, or 32 nodes in the same box,
> running a single system image (SSI) of the OS?
> Having a system with 8, 16, or 32 sockets does not necessarily equal
> SMP. Any Opteron based multiprocessor system is actually a NUMA system,
> since each Opteron has it's own memory controller on-chip and own bank
> of DIMMs.
> <aside>
> To split hairs, in a system with multi-core Opterons, the cores on a
> single chip are SMP relative to each other, since they all use the same
> memory controller, and have equal access to the RAM directly controlled
> by that memory controller. But once they access RAM from another chip
> (different socket), it becomes a NUMA situation. (Is there a name for
> this hybrid architecture?)
> </aside>
> If you just want an SSI, and NUMA is acceptable, you can look at the SGI
> Altix systems. They use SGI's NUMAlink (TM) Architecture to scale up the
> # of processors while behaving as a single NUMA system. The first Altix
> systems used Itanium processors which aren't binary compatible with x86
> processors (a real inconvenience) if you were planning on running
> commercial, binary-only x86 software) but there are newer Altix systems
> (XE series) that use x86-based processors.
> http://www.sgi.com/products/servers/altix/xe/
> If you want that many processors in a single system, you probably do
> want NUMA, since the single memory controller for that many processors
> will become a bottleneck.
> --
> Prentice
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