[Beowulf] Optimal BIOS settings for Tyan K8SRE
Bruce Allen
ballen at gravity.phys.uwm.edu
Mon Sep 4 00:26:43 PDT 2006
On Sun, 3 Sep 2006, Mark Hahn wrote:
>> ECC Features
>> ECC Enabled
>> ECC Scrub Redirection Enabled
>> Dram ECC Scrub CTL Disabled
>> Chip-Kill Disabled
>> DCACHE ECC Scrub CTL Disabled
>> L2 ECC Scrub CTL Disabled
You can find our systems BIOS/ECC/Scrub settings here:
http://www.lsc-group.phys.uwm.edu/beowulf/nemo/construction/BIOS/bios_settings.txt
Our systems are Supermicro H8SSL-i motherboards, with a
Serverworks/Broadcom HT1000 chipset and a single Opteron 175 (dual core,
2.2 GHz).
The ECC part is:
DRAM ECC Enable = Enabled
MCA DRAM ECC Logging = Enabled
DRAM Scrub Redirect = Enabled
DRAM BG Scrub = 2.62ms
L2 Cache BG Scrub = 84.00ms
Data Cache BG Scrub = 84.00ms
Scrubbing is done one cache line (64) bytes at a time. Thus with 2GB of
memory and DRAM background scrub interval of 2.62ms we will scrub the
entire memory in approximately:
2 GB/64 Bytes * 2.62 ms = 2^31 / 2^6 * 2.62 ms = 87912 secs
So our choices correspond to one complete scrub of DRAM per day. Our
settings scrub the L2 cache more often: about once every half hour. Just
modify the calculation above, using 1MB instead of 2GB, and 84 ms instead
of 2.62 ms. One finds that the L2 cache is scrubbed about once every 1376
seconds (every 23 minutes).
Cheers,
Bruce
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