[Beowulf] Thought that this might be of interest

[Richard Walsh]

Vincent Diepeveen wrote:
> Impressive bandwidth.
>
> Is this the so called 'k8h' revision which has improved SSE2 throughput?
     The socket F series is generally referred to as K8L (revision H).  
The dual-core
     is already available and is primarily a pin-count and memory 
controller upgrade
     (to DDR2).  Bus bandwidth is 10.67 GB/sec.

     The impoved widths in SSE and bus to L1 and L2 cache don't make it 
into the
     design until the quad core (Barcelona) late Q2 next year.  This 
chip will have
     two memory controllers on die, although they will run at 6.4 
GB/sec. each, rather
     than 10.67 each at first.

     Here is a very complete presentation on AMD's plans over the next year.

     http://www.tacc.utexas.edu/cluster2006/Herve_Chevanne.pdf

     In making purchasing decisions, I would consider the dual-core 
socket F especially
     knowing that it will be socket compatible with the quad-core chips 
released next
     year.  I am having trouble imagining the performance on 
dual-socket, quad-core
     Intel systems all working through one Northbridge even through the 
Intel "Core"
     design is very good.   AMD make a number of similar changes in the 
Barcelona,
     except it leaves the processor at onl 3-way super-scalar.

     rbw
    



-- 

Richard B. Walsh

"The world is given to me only once, not one existing and one
 perceived. The subject and object are but one."

Erwin Schroedinger

Project Manager
Network Computing Services, Inc.
Army High Performance Computing Research Center (AHPCRC)
rbw at ahpcrc.org  |  612.337.3467

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