[Beowulf] Re: cheap PCs this christmas

[Robert G. Brown]

On Tue, 15 Nov 2005, Andrew Piskorski wrote:

>> and reduces the total memory capacity of a chip.
>
> I'm not sure about that, although it does sound plausible.

In the old (PC) days, it didn't reduce the capacity of a chip; it
required an extra chip.  There were typically 8 chips on a non-parity
system row and 9 on a parity row.  This was actually emulated, IIRC, on
the original memory dimms -- you could count chips lined up on a dimm
and if there were 9 it was probably parity (the extra bit).  So it
didn't affect chip capacity, but it did require real estate for the
extra bit on e.g. expansion cards or the motherboard.

Nowadays they pack a lot more structure into a single chip -- instead of
being 64K single bits in a particular bit location in a byte (per chip)
whole chunks of memory are on single chips.  Here I could believe that
the same thing is true -- the parity bit requires real estate
(everything requires real estate) and on a chip trying to get the
greatest possible capacity per cm^2 perhaps it comes out of the total
capacity one COULD get on that space, although I suspect that a lot of
chip designs don't actually fill the space to capacity anyway -- they
just pack in memory within the modulus of chipsizes that can easily be
stuck onto a DIMM.

    rgb

>
>

-- 
Robert G. Brown	                       http://www.phy.duke.edu/~rgb/
Duke University Dept. of Physics, Box 90305
Durham, N.C. 27708-0305
Phone: 1-919-660-2567  Fax: 919-660-2525     email:rgb at phy.duke.edu