[Beowulf] Re: vectors vs. loops

[Alan Louis Scheinine]

Michael Prinkey wrote:
  > I'm not a hardware engineer, but it seems to me that pin count becomes an
  > issue.  With N cores and M memory controllers, there would need to be
  > M*bus_width pins on the socket and M independent banks of RAM modules.
  > That doesn't seem viable as producing a chip package with such a high pin
  > count and motherboards with so many traces will not be very economical.

A point about heat generation.
I was looking at the hyperchannel specs and memory controller
specs (it happened to be a document of FPGA programmable I/O impedance,
so I do not know if this is the general case for OTS motherboards),
I saw that the chip pins have matching impedance to the board traces,
which in turn have impedance of microwave traces (50 - 100 ohms),
just like the bad old days of ECL.  In those days it was clear that
massive amount of connections must generate alot of heat due to the
laws of physics, the impedance of a line cannot be more than 300 ohm
and anything higher than 100 ohm would have an impracticle geometry.
Moreover, 75 ohm or less is more practicle for dense packing of wires.
Since we have "returned" to impedance matching of I/O (due to the high
frequency) the pin count becomes important beyond just the physical layout.
Some articles on the grand future of optical computing published a few
years ago seem silly in view of the fact the geometry of light channels
is much larger than the size of present-day wires on the chip, but on
the other hand, it seems to me that technological advances in the use of
light (optical wavelengths) for chip I/O are very important for the future.
(Or what else, millivolt differential signals perhaps?)
Alan Scheinine
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