[Beowulf] cheap SCI on a chip?

[Andrew Piskorski]

I was idly wondering about the economics of SCI and other high
bandwith low latency interconnects.

E.g., what portion of their high price stems solely from low volume
production, and what portion is inherent in the design?  How does the
cost of fabbing an SCI chipset compare to that for Gigabit Ethernet,
or 10 Gigabit Ethernet, assuming (very atypically of course) equal
volume production?

Googling, I found this:

> http://www.scizzl.com/WhatIsSCI.html

> SCI protocols were kept simple so interface chips could run fast,
> therefore interfaces have a low gate count and will be very
> inexpensive when volumes become high.

So, one, is that true?  And two, if it is true, what could conceivably
cause SCI (or other such interconnects of interest for scientific
computing) to be produced in high enough volumes to make it cheap?

-- 
Andrew Piskorski <atp at piskorski.com>
http://www.piskorski.com/