Intel 860 PCI bandwidth problem

[Steffen Persvold]

Greg Lindahl wrote:
> 
> On Fri, Jan 18, 2002 at 10:40:37PM -0700, Maurice Hilarius wrote:
> 
> > Implication: The early termination limits the maximum bandwidth to ~90 MB/s.
> 
> That note sounds like it's not talking about DMA operation. You did
> look at the Myrinet Experiences website
> 

I think you misunderstood, "memory read multiple" is the PCI instruction used by most DMA engines
(SCSI, ethernet, SCI and I would guess Myrinet) when they read from RAM (source machine). On the
other side (destination), "memory write invalidate" is normally used.

However, this errateadoesn't limit the SCI DMA bandwith to ~90MB/s either, 210MB/s is the most I've
seen so far.

Regards,
-- 
  Steffen Persvold   | Scalable Linux Systems |   Try out the world's best   
 mailto:sp at scali.no  |  http://www.scali.com  | performing MPI implementation:
Tel: (+47) 2262 8950 |   Olaf Helsets vei 6   |      - ScaMPI 1.12.2 -         
Fax: (+47) 2262 8951 |   N0621 Oslo, NORWAY   | >300MBytes/s and <4uS latency