Intel compilers for Linux 5.0 beta

[Rayson Ho]

Yes, we should turn on ALL possible optimizations...

One more important optimization we should do: "Profile-Guide
Optimization"
This works by:
1) compile with the profiling code inserted by the compiler (-prof_gen)
2) run the binary, and the trace information will be written to disk
3) feed the information back to the compiler (-prof_use)

The Intel compiler can optimize the code in each procedure and can also
relocate the procedures so there is less page faults, cache misses.
(Also, it does function inlining if possible)

Also, from Aceshardware, the new "Intel C 5.0.1 Beta compiler" can
vectorize so of the loops in their benchmarks. Even if this is not
possible, it can "fix" the stupid x87 fp-stack by using SSE2, which
provides much better fp performance by reducing the number of FLD and
FXCH instructions.

http://www.aceshardware.com/Spades/read.php?article_id=40000192

Rayson







--- Herbert Fruchtl <fruechtl at fecit.co.uk> wrote:
> Hi Ole,
> 
> > Some results are published on our simple unofficial web site
> > computational-battery.org where we welcome contributions.
> 
> > Fortran compiler benchmarks:
> > http://computational-battery.org/Programvare/f-g-i-p.html
> 
> I just looked at yor comparison of the Intel and PGI compilers. I'm
> particularly interested in the performance on the P4, but I have a
> few
> remarks about your use of the PGI compiler:
> 
> - The newest release (3.2-4) allows to specify Pentium 4 as target
> (-tp
> piv).
> - All scientific codes I know (I am a quantum chemist) use double
> precision as default. For this, the PIII SSE instructions are useless
> (I
> think). The SSE2 instructions of the P4 should work. It would be
> interesting to see the results of your tests with -tp piv -Mvect=sse.
> 
> Looks like the P4 information didn't make it into the PGI manual. I
> found it in the release notes:
> 
> http://www.pgroup.com/ppro_docs/pgiws_rel/pgiwsr.htm
> 
> Regards,
> 
>   Herbert
> 
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