[epic] epic100.c fix for 2.2.x kernels

Andreas Steinmetz ast@domdv.de
Wed, 05 Jul 2000 17:00:52 +0200 (MEST)


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Hello everybody,
first things first: please CC me as Im not subscribed to the targeted lists.

Problem description: About a year ago I had a problem with the SMC9432BTX cards
and the epic100.c driver. The cards did send but didn't receive. After an
initial fix and then spraying delays in the epic_open() routine this was mostly
fixed. Unfortunately there was not much help I did get from the driver's author.

Last week I did get a new set of SMC9432BTX cards with a new hardware revision
(the older cards do have revision 08, the new ones revision 09). The being deaf
problem reappeared with the new cards.

The first thing I tried was to get a current driver for 2.2.x kernels from the
driver author's website - to no avail, new drivers only for development kernels.

I have to admit that I have contacted the author with the new problem just
recently - didn't get any answer until now. I do believe, however, that due to
my experience with the problem a year ago the only thing I will get is a rant
about delays.

Well, I fixed the 2.2.x driver (the one included in the 2.2.16 kernel) to work
with the old and the new cards. The (actually very small) fix is attached.

I'm however very unsatisfied with the reponsiveness of the maintainers
involved. I do know that there is political trouble between them but that
must not lead to the point where functionality of the code is of less concern
than political issues.
Please note that a part of the fix attached was posted by me in March 1999 to
the epic list. Up to today the driver's author ignored the fix.

I ask everybody having trouble with the SMC9432BTX cards to try this fix and,
if the fix does help them, to contact the people responsible for integration of
the fix to do so.


Andreas Steinmetz
D.O.M. Datenverarbeitung GmbH

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--- linux-old/drivers/net/epic100.c	Wed Jul  5 15:06:50 2000
+++ linux-new/drivers/net/epic100.c	Wed Jul  5 15:08:39 2000
@@ -561,8 +561,12 @@
 	outl((phy_id << 9) | (location << 4) | MII_READOP, ioaddr + MIICtrl);
 	/* Typical operation takes < 50 ticks. */
 	for (i = 4000; i > 0; i--)
+	{
+		/* Donald: no delay is too fast for some systems !!! */
+		udelay(10);
 		if ((inl(ioaddr + MIICtrl) & MII_READOP) == 0)
 			return inw(ioaddr + MIIData);
+	}
 	return 0xffff;
 }
 
@@ -573,6 +577,8 @@
 	outw(value, ioaddr + MIIData);
 	outl((phy_id << 9) | (location << 4) | MII_WRITEOP, ioaddr + MIICtrl);
 	for (i = 10000; i > 0; i--) {
+		/* Donald: no delay is too fast for some systems !!! */
+		udelay(10);
 		if ((inl(ioaddr + MIICtrl) & MII_WRITEOP) == 0)
 			break;
 	}
@@ -592,6 +598,9 @@
 	/* Soft reset the chip. */
 	outl(0x4001, ioaddr + GENCTL);
 
+	/* Donald: You *NEED* this!!! Remember my post about a year ago? */
+	for(i=0;i<5000;i++)udelay(10);
+
 	if (request_irq(dev->irq, &epic_interrupt, SA_SHIRQ, dev->name, dev))
 		return -EAGAIN;
 
@@ -608,7 +617,12 @@
 	   required by the details of which bits are reset and the transceiver
 	   wiring on the Ositech CardBus card.
 	*/
+
+	/* Donald: If this is for Cardbus only then define it so. It
+	   breaks the SMC9432BTX Rev 09 boards */
+#ifdef CARDBUS
 	outl(0x12, ioaddr + MIICfg);
+#endif
 	if (ep->chip_flags & MII_PWRDWN)
 		outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL);
 

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