[eepro100] Re: [tulip] ZYNX 4-port (21143) fails to autonegotiate correctly.(tulip: 0.9.14, RH 7.1)

[Ben Greear]

Bogdan Costescu wrote:
> 
> On Sun, 22 Apr 2001, Ben Greear wrote:
> 
> > The 4th port of the ZYNX (eth4) is connected to the third eepro (eth3)
> > on lf1.  The ZYNX seems to be claiming that it can do, and has done autonegotiation,
> > but the eepro sees it as fixed at 100bt.
> >
> > The end result is JABBER being seen by the eepro, and lots of CARRIER
> > errors reported by the tulip.  I'm dropping around 5% of the packets when
> > running random packet size at 512Kbps....
> 
> Are you sure that you have a good cable ? Is the problem always appearing
> between the 4th ZYNX port and an eepro card ? (You said that you have 2
> ZYNX cards, is the other one behaving the same ?)

I changed the cables, the problem followed the cards.  Interestingly, as
I looked longer at the problem, I realized that my eepro that was acting
wierd had a different PHY chipset than the ones that work fine.  So,
there may have been a problem with the tulip, but now it seems more likely
that it was the eepro that was wrong this time.

The eepros with the DP83840 PHY don't seem to autonegotiate correctly
(the advertise the wrong thing), where as the i82555s seem to work fine.
I didn't have time to try an i82555 card wit the tulip last night...but
I will later today.

Maybe a tweak is needed to the eepro to kick the DP83840 chip into
autonegotiation mode?

Here is part of the boot message, eth2 works fine..the others show
JABBER & do not correctly advertise autonegotiate to their peers..

eth1: Intel PCI EtherExpress Pro100 82557, 00:A0:C9:25:48:9D, IRQ 10.
  Receiver lock-up bug exists -- enabling work-around.
  Board assembly 352509-003, Physical connectors present: RJ45
  Primary interface chip DP83840 PHY #1.
  DP83840 specific setup, setting register 23 to 8462.
  General self-test: passed.
  Serial sub-system self-test: passed.
  Internal registers self-test: passed.
  ROM checksum self-test: passed (0x49caa8d6).
  Receiver lock-up workaround activated.
eth2: Intel PCI EtherExpress Pro100 82557, 00:A0:C9:77:9D:D9, IRQ 9.
  Receiver lock-up bug exists -- enabling work-around.
  Board assembly 678400-001, Physical connectors present: RJ45
  Primary interface chip i82555 PHY #1.
  General self-test: passed.
  Serial sub-system self-test: passed.
  Internal registers self-test: passed.
  ROM checksum self-test: passed (0x49caa8d6).
  Receiver lock-up workaround activated.
eth3: Intel PCI EtherExpress Pro100 82557, 00:A0:C9:24:DC:47, IRQ 5.
  Receiver lock-up bug exists -- enabling work-around.
  Board assembly 352509-003, Physical connectors present: RJ45
  Primary interface chip DP83840 PHY #1.
  DP83840 specific setup, setting register 23 to 8462.
  General self-test: passed.
  Serial sub-system self-test: passed.
  Internal registers self-test: passed.
  ROM checksum self-test: passed (0x49caa8d6).
  Receiver lock-up workaround activated.

> 
> You can try also try to use the '-R' flag of mii-diag to restart
> autonegotiation on the failing link.
> 
> Sincerely,
> 
> Bogdan Costescu
> 
> IWR - Interdisziplinaeres Zentrum fuer Wissenschaftliches Rechnen
> Universitaet Heidelberg, INF 368, D-69120 Heidelberg, GERMANY
> Telephone: +49 6221 54 8869, Telefax: +49 6221 54 8868
> E-mail: Bogdan.Costescu@IWR.Uni-Heidelberg.De

-- 
Ben Greear (greearb@candelatech.com)  http://www.candelatech.com
Author of ScryMUD:  scry.wanfear.com 4444        (Released under GPL)
http://scry.wanfear.com               http://scry.wanfear.com/~greear