<div dir="ltr">I saw that article as well. It seems like they are targeting using RISC-V to build an accelerator. One could argue that you do not need speculation within a GPU-like accelerator, but you have to get your performance from very wide execution units with lots of memory requests in flight as a GPU does today.</div><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Jul 17, 2018 at 8:19 AM, John Hearns via Beowulf <span dir="ltr"><<a href="mailto:beowulf@beowulf.org" target="_blank">beowulf@beowulf.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div>This article is well worth a read, on European Exascale projects<br></div><div><br></div><div><a href="https://www.theregister.co.uk/2018/07/17/europes_exascale_supercomputer_chips/" target="_blank">https://www.theregister.co.uk/<wbr>2018/07/17/europes_exascale_<wbr>supercomputer_chips/</a></div><div><br></div><div>The automotive market seems to have got mixed in there also!</div><div>The main thrust dual ARM based and RISC-V<br></div><div><br></div><div>Also I like the plexiglass air shroud pictured at Barcelona. I saw something similar at the HPE centre in Grenoble.</div><div>Damn good idea.</div><div><br></div><div><br></div><div><br></div><div><br></div><div><br></div><div><br></div></div><div class="HOEnZb"><div class="h5"><div class="gmail_extra"><br><div class="gmail_quote">On 17 July 2018 at 13:07, Scott Atchley <span dir="ltr"><<a href="mailto:e.scott.atchley@gmail.com" target="_blank">e.scott.atchley@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hi Chris,<div><br></div><div>They say that no announced silicon is vulnerable. Your link makes it clear that no ISA is immune if the implementation performs speculative execution. I think your point about two lines of production may make sense. Vendors will have to assess vulnerabilities and the performance trade-off.</div><div><br></div><div>Personally, I do not see a large HPC system being built out of non-speculative hardware. You would need much more hardware to reach a level of performance and the additional power could lead to a lower performance per Watt (i.e., exceed the facility's power budget).</div><span class="m_-6193516357112197540HOEnZb"><font color="#888888"><div><br></div><div>Scott</div></font></span></div><div class="m_-6193516357112197540HOEnZb"><div class="m_-6193516357112197540h5"><div class="gmail_extra"><br><div class="gmail_quote">On Tue, Jul 17, 2018 at 2:33 AM, Chris Samuel <span dir="ltr"><<a href="mailto:chris@csamuel.org" target="_blank">chris@csamuel.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span>On Tuesday, 17 July 2018 11:08:42 AM AEST Chris Samuel wrote:<br>
<br>
> Currently these new vulnerabilities are demonstrated on Intel & ARM, it will<br>
> be interesting to see if AMD is also vulnerable (I would guess so).<br>
<br>
</span>Interestingly RISC-V claims immunity, and that looks like it'll be one of the <br>
two CPU architectures blessed by the Europeans in their Exascale project <br>
(along with ARM).<br>
<br>
<a href="https://riscv.org/2018/01/more-secure-world-risc-v-isa/" rel="noreferrer" target="_blank">https://riscv.org/2018/01/more<wbr>-secure-world-risc-v-isa/</a><br>
<br>
All the best,<br>
<div class="m_-6193516357112197540m_-1471058428635286128HOEnZb"><div class="m_-6193516357112197540m_-1471058428635286128h5">Chris<br>
-- <br>
Chris Samuel : <a href="http://www.csamuel.org/" rel="noreferrer" target="_blank">http://www.csamuel.org/</a> : Melbourne, VIC<br>
<br>
______________________________<wbr>_________________<br>
Beowulf mailing list, <a href="mailto:Beowulf@beowulf.org" target="_blank">Beowulf@beowulf.org</a> sponsored by Penguin Computing<br>
To change your subscription (digest mode or unsubscribe) visit <a href="http://www.beowulf.org/mailman/listinfo/beowulf" rel="noreferrer" target="_blank">http://www.beowulf.org/mailman<wbr>/listinfo/beowulf</a><br>
</div></div></blockquote></div><br></div>
</div></div><br>______________________________<wbr>_________________<br>
Beowulf mailing list, <a href="mailto:Beowulf@beowulf.org" target="_blank">Beowulf@beowulf.org</a> sponsored by Penguin Computing<br>
To change your subscription (digest mode or unsubscribe) visit <a href="http://www.beowulf.org/mailman/listinfo/beowulf" rel="noreferrer" target="_blank">http://www.beowulf.org/mailman<wbr>/listinfo/beowulf</a><br>
<br></blockquote></div><br></div>
</div></div><br>______________________________<wbr>_________________<br>
Beowulf mailing list, <a href="mailto:Beowulf@beowulf.org">Beowulf@beowulf.org</a> sponsored by Penguin Computing<br>
To change your subscription (digest mode or unsubscribe) visit <a href="http://www.beowulf.org/mailman/listinfo/beowulf" rel="noreferrer" target="_blank">http://www.beowulf.org/<wbr>mailman/listinfo/beowulf</a><br>
<br></blockquote></div><br></div>