<HTML><BODY><div class="js-helper js-readmsg-msg">
<style type="text/css"></style>
<div>
<base target="_self" href="https://e.mail.ru/">
<div id="style_14983900290000000077_BODY">
Returning to the first message:<br>> Also regarding compute power, it would be interesting to see a comparison<br>> of a single socket of these versus Xeon Phi rather than -v4 or -v5 Xeon.<br><br>I partially disagree w/general discussion direction. AMD Epyc looks as excellent CPUs for datacenters. But if we say about Beowulf and HPC, we must start 1st of all not from SPECfp_rate, but simple from FLOPS per cycle for core, or somes like Linpack, dgemm or like other tests.<br><br>OK, it's known that Zen core support AVX2 only via 128 bits base, and gives only 8 DP FLOPS per cycle (see<br><a href="http://www.linleygroup.com/mpr/article.php?id=11666" target="_blank">http://www.linleygroup.com/mpr/article.php?id=11666</a><br>or<br><a href="https://www.hotchips.org/wp-content/uploads/hc_archives/hc28/HC28.23-Tuesday-Epub/HC28.23.90-High-Perform-Epub/HC28.23.930-X86-core-MikeClark-AMD-final_v2-28.pdf" target="_blank">https://www.hotchips.org/wp-content/uploads/hc_archives/hc28/HC28.23-Tuesday-Epub/HC28.23.90-High-Perform-Epub/HC28.23.930-X86-core-MikeClark-AMD-final_v2-28.pdf</a> <br><br>Broadwell core gives 16 FLOPS/cycle, and Skylake-SP 32 FLOPS/cycle w/AVX512. Therefore SPECfp_rate2006 may be good for Epyc 7601 because of 32 cores per CPU instead of 22 cores for Broadwell Xeon E5-2699A v4. Xeon Phy KNL cores also gives 32 DP FLOPS per cycle. By my opinion, it's necessary to wait results of normal HPC tests. <br><br>Mikhail Kuzminsky<br>
</div>
<base target="_self" href="https://e.mail.ru/">
</div>
</div></BODY></HTML>