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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>To make it more accurate, most PCIe chipsets supports 256B
reads, and the data bandwidth is 26Gb/s, which makes it 26+26, not 20+20. <o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'><o:p> </o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>Gilad<o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'><o:p> </o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'><o:p> </o:p></span></p>
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<p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span
style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> beowulf-bounces@beowulf.org
[mailto:beowulf-bounces@beowulf.org] <b>On Behalf Of </b>richard.walsh@comcast.net<br>
<b>Sent:</b> Monday, March 15, 2010 2:25 PM<br>
<b>To:</b> beowulf@beowulf.org<br>
<b>Subject:</b> Re: [Beowulf] Q: IB message rate & large core counts (per
node)?<o:p></o:p></span></p>
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<p class=MsoNormal><o:p> </o:p></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><o:p> </o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>On
Monday, March 15, 2010 1:27:23 PM GMT Patrick Geoffray wrote: <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><o:p> </o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>>I
meant to respond to this, but got busy. You don't consider the protocol<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>>efficiency,
and this is a major issue on PCIe.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><o:p> </o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>Yes,
I forgot that there is more to the protocol than the 8B/10B encoding,<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>but
I am glad to get your input to improve the table (late or otherwise).<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><br>
>First of all, I would change the labels "Raw" and
"Effective" to <br>
>"Signal" and "Raw". Then, I would add a third column
"Effective" which <br>
>consider the protocol overhead. The protocol overhead is the amount
of <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><o:p> </o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>I
think adding another column for protocol inefficiency column makes<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>some
sense. Not sure I know enough to chose the right protocol performance<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>loss
multipliers or what the common case values would be (as opposed<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>to
best and worst case). It would be good to add Ethernet to the mix<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>(1Gb,
10Gb, and 40Gb) as well. Sounds like the 76% multiplier is <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>reasonable
for PCI-E (with a "your mileage may vary" footnote). The table<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>cannot
perfectly reflect every contributing variable without getting very large. <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>Perhaps,
you could provide a table with the Ethernet numbers, and I will do<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>some
more research to make estimates for IB? Then I will get a draft to
Doug<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>at
Cluster Monkey. One more iteration only ... to improve things, but avoid<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>a
"protocol holy war" ... ;-) ... <o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><o:p> </o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>>raw
bandwidth that is not used for useful payload. On PCIe, on the Read <br>
>side, the data comes in small packets with a 20 Bytes header (could be <br>
>24 with optional ECRC) for a 64, 128 or 256 Bytes payload. Most PCIe <br>
>chipsets only support 64 Bytes Read Completions MTU, and even the ones <br>
>that support larger sizes would still use a majority of 64 Bytes <br>
>completions because it maps well to the transaction size on the memory <br>
>bus (HT, QPI). With 64 Bytes Read Completions, the PCIe efficiency is <br>
>64/84 = 76%, so 32 Gb/s becomes 24 Gb/s, which correspond to the hero <br>
>number quoted by MVAPICH for example (3 GB/s unidirectional). <br>
>Bidirectional efficiency is a bit worse because PCIe Acks take some raw <br>
>bandwidth too. They are coalesced but the pipeline is not very deep, so <br>
>you end up with roughly 20+20 Gb/s bidirectional.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><o:p> </o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>Thanks
for the clear and detailed description.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><br>
>There is a similar protocol efficiency at the IB or Ethernet level, but <br>
>the MTU is large enough that it's much smaller compared to PCIe.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><o:p> </o:p></span></p>
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<p class=MsoNormal style='margin-bottom:12.0pt'><span style='font-family:"Arial","sans-serif";
color:black'>Would you estimate less than 1%, 2%, 4% ... ??<br>
<br>
>Now, all of this does not matter because Marketers will keep using <br>
>useless Signal rates. They will even have the balls to (try to) rewrite <br>
>history about packet rate benchmarks...<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>I
am hoping the table increases the number of fully informed decisions on<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>these
questions.<o:p></o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'><o:p> </o:p></span></p>
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<p class=MsoNormal><span style='font-family:"Arial","sans-serif";color:black'>rbw<br>
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