[Beowulf] Nehalem and Shanghai code performance for our rzf example
Lux, James P
james.p.lux at jpl.nasa.gov
Mon Jan 19 14:07:59 PST 2009
On 1/19/09 10:07 AM, "Joe Landman" <landman at scalableinformatics.com> wrote:
John Hearns wrote:
> BTW, re the discussion on processor frequency scaling,
> what finally did happen to Emitter Coupled Logic and gallium arsenide?
GaAs ... the material of the future. And always will be.
> As a cub high energy physicist, I devoted many hours to learning about
> ECL and Fastbus - it was (still is) the fastest switching technology,
> therefore the Fastbus standard was based around it. Ditched now I think
> for VMEbus systems.
> Sigh. Those big old crates were a reaql sight.
> I wonder out loud if any exotic semiconductor plus ECL will be revived
> in the future.
The problems with GaAs are economic, and perceived safety (not to
mention the technological problem of controlling defects in the material
... EL2 was/is a fun one). Economic, as Silicon has a huge installed
base, and you can't simply switch materials in the same foundery ...
different materials do require different processes and machines ...
which increases costs. There are no economies of scale for GaAs.
Perceived safety as the high temperature grown GaAs required 5+
atmospheres of Arsenic gas at ~500C or thereabouts (quoting from memory)
to maintain an equilibrated growth. Not too many people want to live
near such a thing. There is a low temperature grown GaAs, though this
has a number of defects you have to get better control over for devices.
As if conventional silicon processes don't use delightful gases like phosphine, arsine, and NF3, not to mention HF as an etchant? I doubt that it's really a safety issue. If people actually knew how much deadly stuff there is in the typical foundry/fab, there would be picket lines down the block outside.
It's all about yield. A) you can't grow as big GaAs as Si crystals, so wafer size is smaller. B) defects are more common.. Less of an issue for small die, where you can just throw away the ones with bad spots; tough for big dice, where the odds of getting a defect in every die on the wafer gets big
And, GaAs is not what you'd call a low power technology. No equivalent of CMOS for GaAs, it's all bipolar, and in the case of GaAs ECL, non saturated, so it draws a lot of power. A saving grace is that you can run the junctions a lot hotter with GaAs, but even so, getting the heat out of the die is a challenge.
SiGe is probably more promising for real high speed stuff: you can integrate SiCMOS stuff with the SiGe on the same die.
For real speed and power GaN is interesting.
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