[Beowulf] 64-core processor...
larry.stewart at sicortex.com
Tue Aug 21 10:21:32 PDT 2007
> Ars Technica also has an article on this:
> Good for additional information.
From the picture in Ars Technica, there are four memory controllers for
There is no floating point, but there would certainly be room for it in
a 65 nm version.
It seems to me that the key difficulty for building larger clusters out
of these things
is the imbalance between computing and memory bandwidth. That is fine
and routing, but not so fine for general purpose computing. 16 cores
per DDR interface
(doesn't say if they are 64 or 128 bits wide, but I would guess 64 based
on reasonable size
package pin counts) seems way too skinny a pipe to memory to be reasonable.
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