Hardware Progress: $397 (fwd)

Phillip Matz matz at wsunix.wsu.edu
Wed Mar 27 14:00:28 PST 2002

AMD gate lengths are 65nm for their 130nm node, but this is not specific
to AMD.  Check out the ITRS specifications regarding technology nodes
recent bifurcation between minimum metal pitch, as-drawn gate length and
etch-back gate length.

The cost savings are rationalized with respect to the expense of trying
to make a chip now that we will presumably be making in 2006.  In other
words a chip that will cost $60 in 2006 measuring 80 mm^2 would cost 20
times that if made now because the chip size would be 320 mm^2 on
today's technology nodes.  However comparing the cost of manufacturing a
chip measuring 80 mm^2 now to the cost of manufacturing a chip measuring
80 mm^2 in 2006 is entirely a different thing.

- Phil

-----Original Message-----
From: beowulf-admin at beowulf.org [mailto:beowulf-admin at beowulf.org] On
Behalf Of Christoph Wasshuber
Sent: Wednesday, March 27, 2002 10:43 AM
Cc: Beowulf at beowulf.org
Subject: Re: Hardware Progress: $397 (fwd)

> AMD plans to be
> producing chips with 65nm feature size by 2006,
> which should lead to a 20x reduction in cost.

Who says that 65nm feature size (which means 
in this case gate length) results in 20x cost
Given that all processing tools for such a
technology are more expensive and the fact that
we are already today at ~100nm in production
there is hardly a 20x cost reduction possible.
The real are reduction is dependent on minimum
pitch which is a lot larger more like 300nm.

Going to 300mm wafers will reduce overall cost,
but this has nothing to do with minimum feature

I would think a cost reduction by 2-5x maximum
in 2006.

Beowulf mailing list, Beowulf at beowulf.org
To change your subscription (digest mode or unsubscribe) visit

More information about the Beowulf mailing list