My jaw has hit the floor...

Tom Morris Tom.Morris at
Tue Feb 20 22:38:56 PST 2001

On Tuesday, February 20, 2001 2:27 AM, Greg Lindahl
[SMTP:lindahl at] wrote:
> On Thu, Feb 15, 2001 at 01:19:23PM -0500, Tom Morris wrote:
> > Actually our initial implementations are 1 Gb/s per pin (500 MHz DDR)
> > and 8 bits wide in each direction.  I usually call that 1 GB/s, but if
> > count the way the RapidIO and Infiniband folks do, it would be 2 GB/s.
> I was just repeating what the article said. 

Sorry.  I didn't go back and read the original article.
It was probably talking about an AMD chipset since
that's where most of the quotes came from.

> I didn't know your chipset was out of non-disclosure.

It's not, except for the details that we've publicly disclosed.
Speed and width of the link we've talked about.


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