D-Link switch and ecc-memory.

[Gerry Creager N5JXS]

Thomas Lovie wrote:
> 
> Regarding spurious bit-flips in memory, Greg Lindahl writes:
> 
> > Josip neglected to mention that he is at sea level. If you are at a higher
> > altitude, you will see more errors.
> >
> 
> Really, why would this be the case?  Surely the boiling temperature of water
> would have nothing to do with it.  Would the relative amount of atmosphere
> that high energy electro-magnetic radiation has to go through be the
> dominating effect here?  Is it radiation that causes these errors anyways?

When I was working with satellite design, this was, indeed, a real
problem.  Most of the satellite work I've done has been in connection
with the Amateur Radio OSCAR series, but the results are very real.  For
a number of years, the best IC technology for spaceborne applications
was CMOS, because of its relative indifference to high-energy particle
bombardment.  Indeed, a fairly unsophistcated CPU, the RCA 1802, was the
workhorse, not only for the OSCARs but a number of commercial internal
housekeeping unit processors on much more "sophisticated" birds.  In the
last 10-15 years, Harris Semiconductors, and more recently LANL, have
done some significant work in radiation-hardening NMOS and PMOS
circuitry, thus "mainstreaming" the iAPx86 architechture for space
applications.

As die sizes, and thus, trace sized, decrease, the potential for a high
energy particle to do significant single event or even permanent damage
to CPSs and memory increases.  It was once suggested that instead of
reaching a relativity limit on substrate, we'd sooner reach a point
where ionizing radiation would be able to stop general development of
ICs for computer applications... simply because we had made the ICs so
small and fast.

Regards,
Gerry Creager
Texas A&M University