memory bandwidth on Athlon systems
Many of your questions may have already been answered in earlier discussions or in the FAQ. The search results page will indicate current discussions as well as past list serves, articles, and papers.
Richard Walsh rbw at networkcs.comWed Jul 19 13:06:07 PDT 2000
- Previous message: memory bandwidth on Athlon systems
- Next message: diskless alphalinux nodes
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
Guignon, The CAS settings on the two boards may be different and if the kx133 bus is asynchronous this would add a one cycle latency delay to any memory reference. This reduces throughput across memory reference bursts. A good reference on this issue (if it applies here) is at: http://www.aceshardware.com/Spades/read.php?article_id=5000172 rbw
- Previous message: memory bandwidth on Athlon systems
- Next message: diskless alphalinux nodes
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
More information about the Beowulf mailing list